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Displays
AND-TFT-8PA
480 x 468 Pixels LCD Color Monitor
N/A
Features
* Compatible with NTSC and PAL system * Pixel in stripe configuration * 8 inch diagonal screen * High brightness * Slim and compact * Imager Reversion: Up/Down and Left/Right * Anti-glare surface treatment * Support multi-display mode (If you use this mode, you must use a specially made timing controller.) * RoHS compliant
The AND-TFT-8PA is a compact full color TFT LCD module, whose driving board is capable of converting composite video signals to the proper interface of LCD panel and is suitable for security, car TV, portable DVD, GPS, multimedia applications and other AV system applications. This device consists of a TFT-LCD module that has 480 x 468 pixels on a 8 inch diagonal screen which is normally white in the display mode.
Mechanical Characteristics Item Specification Screen Size Outline Dimensions Active Area Surface Treatment Weight Pixel Configuration Pixel Pitch Display Format Display Mode 8 diagonal 172.4(W) x 132.0 (H) x 6.6 (D)(typ.) 161.28 (W) x 117.94 (H) Anti-glare 232 15 stripe 0.112 (W) x 0.252 (H) 480 x 468 Normally white
Unit inch mm mm - g - mm dot -
Absolute Maximum Rating (GND = 0V, Ta = 25C) Item Symbol VDD2 VDD1 VCC Supply Voltage for Gate Driver VGH- VEE H Level L Level Analog Signal Input Level Storage Temperature Operation Temperature VGH VEE VR+, VG+, VB+ VR-, VG-, VB- - Note 2 Note 1 Remarks Absolute Maximum Rating Min. +9.0 -0.3 -0.3 -0.3 -0.3 -16 +4 0 -30 -20 Max. +15 +7.0 +6.0 +40.0 +25.0 +0.3 +13 5.5 +80 +70 V V C C V Unit
Supply Voltage for Source Driver
V
Note 1: VR, VG, VB means analog input voltage. Note 2: Optical characteristics are measured under Ta=+25C.
1/28/08
Purdy Electronics Corporation * 720 Palomar Avenue * Sunnyvale, CA 94085 Tel: 408.523.8200 * Fax: 408.733.1287 * sales@purdyelectronics.com * www.purdyelectronics.com
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Displays
Power Consumption (Ta = 25C) Symbol
Hi level
AND-TFT-8PA
Conditions VGH = +20V VEE = -8V VDD1 = +3.3V VDD2 = +13V VCC = +3.3V - - Specifications Typ. Max. 0.3814 0.4112 2.0245 5 0.1 78.75 3.6 0.4768 0.5141 2.5306 6.24 0.2 98.60 - Units mA mA mA mA mA mW W Note 1 Note 2 Remarks
Item Supply Current for Gate Driver
IGH IEE IDD1 IDD2 ICC
Low level
Supply Current for Source Driver (Digital) Supply Current for Source Driver (Analog) Supply Current for Gate Driver (Digital)
LCD Panel Power Consumption (Note 1) - Backlight lamp Power Consumption (Note 2) - Note 1: The power consumption for backlight is not included. Note 2: Backlight lamp power consumption is calculated by IL x VL. Recommended Driving Conditions for TFT-LCD Panel Item Analog Supply Voltage for Source Driver Logic H Level Supply Voltage for Gate Driver L Level Logic
VR+, VG+, VB+ (Analog Video +)
Symbol VDD2 VDD1 VGH VEE VCC V+, AC V+, HIGH V-, AC V-, LOW VIH VIL VOH VOL VCOM DC
Specifications Min. Typ. Max. +12 +3.0 +18 -9 +3.0 - 11.6 - 1.6 0.7 -0.3 0.7 -0.3 4.9 +13 +3.3 +20 -8 +3.3 +4.0 11.9 +4.0 1.9 - - - - 5.2 +14 +3.6 +22 -7 +3.6 - 12.2 - 2.2 VDD1 0.3 VDD1 0.3 5.5
Unit V
Remarks
V OP-P V OP-P V V V V
Analog Signal Input Level
VR-, VG-, VB(Analog Video -)
H Level Digital Input Voltage Digital Output Voltage VCOM L Level H Level L Level
DC Component of VCOM Note 1 Note 1: Purdy strongly suggests that the VCOM DC level shall be adjustable, and the adjustable level range is 5.2V 0.3V, every module's VCOM DC level shall be carefully adjusted to show a best image performance. Backlight Driving (JST BHSR-02VS-1, Pin No.: 2) Pin No. 1 2 Symbol VL1 VL2 Description Input terminal (Hi voltage side) Input terminal (Low voltage side) Remarks Wire color: pink Wire color: white Note 1
Note 1: Low voltage side of backllight inverter connects with Ground of inverter circuits.
1/28/08
Purdy Electronics Corporation * 720 Palomar Avenue * Sunnyvale, CA 94085 Tel: 408.523.8200 * Fax: 408.733.1287 * sales@purdyelectronics.com * www.purdyelectronics.com
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Displays
Optical Specifications Item Horizontal Viewing Angle Vertical (Ta = 25C) Symbol Conditions Min. 45 10 30 200 - - 300 70 0.270 0.300 -
AND-TFT-8PA
Specifications Typ. Max. 50 - 15 - 35 - 350 15 25 350 75 0.300 0.330 30,000 - 30 50 - - 0.330 0.360 - ms cd/m2 % - hrs Unit
= 21, = 22 = 12 = 11
CR
CR > 10 At optimized Viewing Angle
deg
Contrast Ratio (Note 1) Response Time Brightness Uniformity White Chromaticity (Note 2) Lamp Life Time +25 C
(Note 2)
Rise Fall
Tr Tf - U x y -
=0
Center point -
=0
-
Note 1: CR = Luminance when Testing point is White Luminance when Testing point is Black Contrast Ratio is measured in optimum common electrode voltage Note 2: Topcon BM-7(fast) luminance meter 2 field of view is used in the testing (after 20~30 minutes operation). Lamp Current : 6mA; Inverter model: TDK-347
Block Diagram
1/28/08
Purdy Electronics Corporation * 720 Palomar Avenue * Sunnyvale, CA 94085 Tel: 408.523.8200 * Fax: 408.733.1287 * sales@purdyelectronics.com * www.purdyelectronics.com
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Displays
Recommended Driving Conditions for Backlight Item Lamp Voltage Lamp Current Lamp Frequency Starting Voltage (25 C) (Reference Value) Starting Voltage (0 C) (Reference Value) Symbol VL IL PL VS VS Note1 Note 2 Note 3 Note 3 Remark 540 4 30 - -
AND-TFT-8PA
Ta = 25C Specifications Unit Min. Typ. Max. 600 6 60 - - 660 8 80 920 1100 Vrms mA KHz Vrms Vrms
Note 1: In order to satisfy the quality of B/L, no matter use what kind of inverter, the output lamp current must between Min. and Max. to avoid the abnormal display image caused by B/L. Note 2: The waveform of lamp driving voltage should be as closed to a perfect sine wave as possible.' Note 3: The "Max of kick of voltage" means the minimum voltage of inverter to turn on the CCFL and it should be applied to the lamp for more than 1 second to start up. Otherwise the lamp may not be turned on.
Interface Pin Assignment Connector: Pin #. Symbol I/O Function 1 STH2 I/O Start pulse for source driver 2 OEH I Output enable for source driver 3 POL I Polarity control for column inversion MOD 4 I Simultaneous/sequential mode select 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 R/L VDD1 CPH3 CPH2 CPH1 VSS1 VDD2 VBVGVRVSS2 VB+ VG+ VR+ VSS2 STH1 VCOM OE1 OE2 OE3 U/D CKV STVD STVU VCC VEE VGH GND I - I I I - - I I I - I I I - I/O I I I I I I I/O I/O - - - - Left/Right Control for source driver Supply voltage of logic circuit for source driver Sample and shift clock for source driver Sample and shift clock for source driver Sample and shift clock for source driver Ground of logic circuit for source driver Supply voltage of analog circuit for source driver Video input B for negative polarity Video input G for negative polarity Video input R for negative polarity Ground for analog circuit for source driver Video input B for positive polarity Video input G for positive polarity Video input R for positive polarity Ground for analog circuit for source driver Start pulse for source driver Voltage for common electrode Output enable for gate driver Output enable for gate driver Output enable for gate driver Up/Down Control for gate drive Shift clock for gate driver Vertical start pulse Vertical start pulse Power supply for gate driver circuit Negative power gate driver Positive power gate driver Ground for gate driver
Remark Note 2
Note 2 Note 7
Note 6
Note 2
Note 1 Note 1 Note 1 Note 3 Note 4 Note 5
1/28/08
Purdy Electronics Corporation * 720 Palomar Avenue * Sunnyvale, CA 94085 Tel: 408.523.8200 * Fax: 408.733.1287 * sales@purdyelectronics.com * www.purdyelectronics.com
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Displays
Note 1 U/D Vcc GND Note 2 R/L Vcc GND Note 3: VCC Typ. = +3.3V Note 4: VEE Typ. = -8V Note 5: VGH Typ. = +20V Note 6: VDD2 Typ. = +13V Note 7: VDD1 Typ. = +3.3V Pixel Arrangement and input connector pin no. STH1 Input Output STH2 Output Input STVD Input Output STVU Output Input
AND-TFT-8PA
Scanning Direction Up to Down Down to Up
Scanning Direction Left to Right Right to Left
1/28/08
Purdy Electronics Corporation * 720 Palomar Avenue * Sunnyvale, CA 94085 Tel: 408.523.8200 * Fax: 408.733.1287 * sales@purdyelectronics.com * www.purdyelectronics.com
5
Displays
Timing Characteristics of Input Signals Characteristics Rising Time Falling Time High and low level pulse width CPH pulse duty STH setup time STH hold time STH pulse width STH period OEH pulse width Samplle and hold disable time OEV pulse width CKV pulse width Horizontal display start Horizontal display timing range STV pusle width Horizontal lines per field Vertical display start Vertical display timing range Distance from OEH to STVD (odd field) Distance from OEH to STVD (evenfield) OE (1, 2, 3) pulse width 1 OE (1, 2, 3) pulse width 2 Distance from CKV to OE1 Distance from OE1 to another OE2 DIstance from OE2 to another OE3 Distance2 from POL to STVD(u) Symbol tr tf tCPH tCWH tSUH tHDH tSTH tH tOEH tDIS1 tOEV tCKV tSH tDH tSTV tV tSV tDV tDIS2 tDIS3 Poev1 Poev2 Tfa1 Tra2 Tra3 Tpol Min. - - 9.2 30 20 20 - 61.5 - - - - - - - 256 - - - - - - - - - - Typ. - - 9.6 50 - - 1 63.5 3.47 7.43 52.3 15.8 0 480 1.5 262 3 234 33.9 2.2 4.2 81.6 14.9 18.1 18.1 2 Max. 10 10 10.0 70 - - - 65.5 - - - - - - - 268 - - - - - - - - - - Unit ns ns MHz % ns ns tCPH s s s s s tCPH /3 tCPH tH tH tH tH s s s s s s s tH
AND-TFT-8PA
Remarks
CPH1 ~CPH3 CPH1 ~ CPH3 STH1, STH2 STH1, STH2 STH1, STH2 STH1, STH2 OEH
OEV CKV
STVD, STVU
1/28/08
Purdy Electronics Corporation * 720 Palomar Avenue * Sunnyvale, CA 94085 Tel: 408.523.8200 * Fax: 408.733.1287 * sales@purdyelectronics.com * www.purdyelectronics.com
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Displays
Dimensional Outline
AND-TFT-8PA
General mechanical tolerance = 0.5mm
1/28/08
Purdy Electronics Corporation * 720 Palomar Avenue * Sunnyvale, CA 94085 Tel: 408.523.8200 * Fax: 408.733.1287 * sales@purdyelectronics.com * www.purdyelectronics.com
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